For the last 80 years, bulk materials, such as silicon, have underpinned electronic devices[1]. Whilst remarkable improvements to performance have been achieved through miniaturisation, progress is slowing as we approach the physical limitations of bulk materials[1, 2]. As materials which naturally exist as 3D crystals, thinning them means detrimental surface effects become more and more dominant. Therefore, to continue pushing device performance, a new class of materials must be used, one that intrinsically lends itself to miniaturisation. Layered materials naturally consist of individual stacked sheets. When thinned down to the monolayer, the resulting ‘2D’ crystals are a few atoms thick, but maintain their crystal structure, allowing the physical limits of bulk materials to be side-stepped. For this reason, to continue making progress, leading chip manufacturers are projecting that by 2028, 2D materials will be utilised at the core of semiconductor device technology[3].

However, to realise widespread adoption of 2D materials for device applications, some key challenges need to be overcome. Whilst intrinsically these materials possess the properties needed to supersede bulk materials, to form devices, these materials must be integrated into larger systems. Increasingly, work is showing that the nature of the interfaces formed during integration are a key factor that is limiting device performance.

At present however, characterising these interfaces is challenging. As atomically thin materials, naturally, effects that influence device performance on the macroscale may only be detectable on the nanoscale. Whilst some techniques exist that can reach these length-scales, they often suffer from issues such as requiring destructive, complex sample preparation or direct contact with a pristine surface.

In this thesis we develop and demonstrate a range of approaches for performing nanoscale characterisation of heterointerfaces in 2D materials.

We first examine interfaces in 2D lateral heterostructures of monolayer transition metal dichalcogenides (1L-TMDs). Studies on the synthesis of these structures have shown a range of interface widths can occur, which will influence their properties. We show that information about the width of the interface can be determined by examining the line-shape of micro-Raman and photoluminescence measurements, even if the interface varies at length-scales below the probe width. This offers a facile non-destructive route to assessing interfacial widths.

We then move on to assessing van der Waals heterostructures using scanning electron microscope cathodoluminescence (SEM-CL). With this, we identify nanoscale inhomogeneities in dielectric environment and strain, which we believe are a result of sample fabrication. Furthermore, we show adopting more advanced fabrication processes improve these effects. We also show that these techniques can be employed on complex device structures comprising multiple integrated 2D materials.

The next part of this thesis focused on employing a set of techniques collectively known as conductive mode SEM (CM-SEM). These techniques allow the mapping of the flow of carriers through a device. Prior to this work, CM-SEM had not been employed on 1L-TMDs in van der Waals heterostructures. To ensure proper interpretation of results, we performed Monte-Carlo simulations of electron sample interactions for such samples, finding depending on the acceleration voltage, up to 70 % of beam electrons can be deposited into the sample. We then used CM-SEM to observe this process, confirming electrons injected into the sample can accumulate in both hBN and 1L- WSe₂. We then find that this accumulation of charge appears to increase the electrical conductivity of hBN and decrease the luminescent efficiency of WSe₂. We then study a transistor device structure through CM-SEM and map out the electric fields caused by Schottky barriers at the contacts, finding nanoscale variations.

Finally, we perform CL on a 2D lateral heterostructure sample, allowing characterisation of its interface with a nanoscale probe. We use these signals to demonstrate the universality of the spectral interface modelling put forward, allowing identification of interfaces below 250 nm wide.

To summarise, the findings in this thesis detail approaches for the characterisation of both lateral and van der Waals heterostructures. With these, it is hoped new insights can be gained that allow for the rational optimization and design of devices comprising 2D materials. They also may allow for the uncovering of new fundamental effects.

[1] M. Mitchell Waldrop. The chips are down for Moore’s law. Nature News, 530(7589):144, February 2016.
[2] Stuart Thomas. An industry view on two-dimensional materials in electronics. Nature Electronics, 4(12):856–857, December 2021.
[3] IRDS™ 2022: More Moore. Technical report, The International Roadmap for Devices and Systems.