Excel file containing data to reproduce the figures in the paper "Parallel Adaptive Equalizer for Alamouti-Coded Signals Recovery in Simplified Coherent PON", organized in the following two sheets (each of them associated to one Figure in the paper):

(1) Fig. 3. Experimental BER as a function of received power for different parallel lanes, using 16-QAM (50 GBd).

(2) Fig. 4. Simulated and experimental power penalty, for a BERT =10−2, versus bus width and clock-speed, for 200 Gbps transmission using (a) 16-QAM, and (b) QPSK. Different lasers linewidths (Δν) are set in simulations, setting the same Δν at the TX and LO lasers. The power penalty is measured with respect to the serial-equalizer sensitivity for each Δν.

The data contained in those sheets were obtained after performing experiments and simulations, described in the paper. The number of parallel lanes, related DSP clock-speed, and lasers linewidth were varied, and the metric “bit error ratio” (BER) and "power penalty" were evaluated for each set of physical parameters. The information is then organized and reported in the tables contained in the Excel sheets.