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Exploiting tightly-coupled cores


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Authors

Bradbury, A 
Koltes, A 

Abstract

The individual processors of a chip-multiprocessor traditionally have rigid boundaries. Inter-core communication is only possible via memory and control over a core’s resources is localised. Specialisation necessary to meet today’s challenging energy targets is typically provided through the provision of a range of processor types and accelerators. An alternative approach is to permit specialisation by tailoring the way a large number of homogeneous cores are used. The approach here is to relax processor boundaries, create a richer mix of intercore communication mechanisms and provide finer-grain control over, and access to, the resources of each core. We evaluate one such design, called Loki, that aims to support specialisation in software on a homogeneous many-core architecture. We focus on the design of a single 8-core tile, conceived as the building block for a larger many-core system. We explore the tile’s ability to support a range of parallelisation opportunities and detail the control and communication mechanisms needed to exploit each core’s resources in a flexible manner. Performance and a detailed breakdown of energy usage is provided for a range of benchmarks and configurations.

Description

This is the published manuscript. It was first published by Springer in the Journal of Signal Processing Systems here: http://link.springer.com/article/10.1007%2Fs11265-014-0944-6.

Keywords

33 Built Environment and Design, 3301 Architecture, 7 Affordable and Clean Energy

Journal Title

Proceedings - 2013 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2013

Conference Name

2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII)

Journal ISSN

Volume Title

80

Publisher

IEEE
Sponsorship
Engineering and Physical Sciences Research Council (EP/G033110/1)
This work was supported by EPSRC grant EP/G033110/1.